Fairchild Semiconductor nds332p free download

File name nds332p.pdf

June 1997 NDS332P P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These P-Channel logic level enhancement mode power field -1 A, -20 V, RDS(ON) = 0.41 @ VGS= -2.7 V effect transistors are produced using Fairchild's proprietary, high RDS(ON) = 0.3 @ VGS = -4.5 V. cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These Very low level gate drive requirements allowing direct devices are particularly suited for low voltage applications such as operation in 3V circuits. VGS(th) < 1.0V. notebook computer power management, portable electronics, Proprietary package design using copper lead frame for and other battery powered circuits where fast high-side superior thermal and electrical capabilities. switching, and low in-line power loss are needed in a very small outline surface mount package. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface Mount package. ________________________________________________________________________________ D G S Asolute Maximum Ratings T A = 25